- Industry: Semiconductors
- Number of terms: 7260
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Texas Instruments (TI) designs and manufactures analog and digital semiconductor IC products for the world market. In addition to analog technologies, digital signal processing (DSP) and microcontroller (MCU) semiconductors, TI designs and manufactures semiconductor solutions for analog and digital ...
A contiguous block in data memory. Fixed-point devices contain a block of 128 words in data memory. Data memory contains 512 data pages. Data page 0 is the first page of data memory (addresses 0000h–007Fh); data page 511 is the last page (addresses FF80h–FFFFh). In floating-point devices, data pages are 64K words long. The ’C3x has a total of 256 pages; the ’C4x has a total of 64K (65,536) pages. See also direct addressing.
Industry:Semiconductors
A register in the asynchronous serial port that writes the data to transmit and reads the data received. See also asynchronous serial port receive shift register.
Industry:Semiconductors
Bits 0–3 of the IOSR. When pins IO0–IO3 are configured as inputs, these bits reflect the current logic levels on the pins. For example, the IO0 bit reflects the level on the IO0 pin. See also CIO0–CIO3 bits; DIO0–DIO3 bits.
Industry:Semiconductors
The mode in which the processor enters a dormant state and dissipates considerably less power than during normal operation.
This mode is initiated by the execution of an IDLE instruction. During a power-down mode, all internal contents are maintained so that operation continues unaltered when the power-down mode is terminated. The contents of all on-chip RAM also remains unchanged.
Industry:Semiconductors
A continuous test used by the programme until a desired condition is met.
Industry:Semiconductors
A register in the CPU expansion register file that contains the address of the beginning of the interrupt vector table.
Industry:Semiconductors
Bits within the asynchronous serial port control register (ASPCR) that individually configure pins IO0–IO3 as either inputs or outputs. For example, CIO0 configures the IO0 pin. See also DIO0–DIO3 bits; IO0–IO3 bits.
Industry:Semiconductors
The mode that allows both the DSPand the host to access host port interface (HPI) memory. In this mode, asynchronous host accesses are synchronised internally and, in case of conflict, the host has access priority and the DSP waits one cycle.
Industry:Semiconductors
A CPU cycle in which the CPU reloads the programme counter with the same address.
Industry:Semiconductors
A register in the CPU expansion-register file that contains the address of the beginning of the trap vector table.
Industry:Semiconductors
